The present invention relates to an analog-to-digital converter and more particularly to an overload detector for such converter.
Digitization of analog signals, including audio, telephone and television, is accomplished by analog to digital (A/D) converters. Because the signal is digitized, the upper and lower excursion that is possible is rigidly defined. The binary scale is used to represent the digital signal magnitude in linear form. The upper limit of the scale is defined to be 255, while the lower limit is 0. In an 8-bit digital system the upper limit is represented by all logic 1's (hexadecimal code FF) and the i lower limit by all logic 0's (hexadecimal code OO).
When the digital signal component is all logic 1's or all logic 0's, the absolute limit is reached. Any additional signal impressed upon the A/D converter is ignored by the circuitry and results in severe distortion of the signal waveform. This in turn often leads to unexpected and undesirable side effects in the overall system performance.
One approach which is used for avoiding distortion of the signal waveform is a conventional level meter. However, when a level meter is used in a system in which speech from a standard desk telephone is impressed on an analog-to-digital converter, the level meter does not indicate voice peaks, many of which are beyond the limits of the A/D converter.
It is therefore an object of the present invention to provide a detector which will effectively indicate overload conditions in an analog-to-digital converter using hardware logic circuitry.
It is another object of the present invention to provide a detector which will indicate overload conditions in a digital signal by using computer software.
It is an additional object of the invention to provide means to visibly or audibly indicate to the user of an analog-to-digital converter system that an input signal is too high or too low.